北京邮电大学学报

  • EI核心期刊

北京邮电大学学报 ›› 2014, Vol. 37 ›› Issue (1): 85-89.doi: 10.13190/j.jbupt.2014.01.019

• 研究报告 • 上一篇    下一篇

基于(16,8)准循环码的星载FPGA有限状态机容错设计

冯水春, 孟新, 毛博年, 卞春江   

  1. 中国科学院 国家空间科学中心, 北京 100191
  • 收稿日期:2013-01-15 出版日期:2014-02-28 发布日期:2014-01-07
  • 作者简介:冯水春(1973—),女,副研究员,E-mail:fengsc_cssar@163.com.

Design of Satellite Borne FPGA Basedon (16,8) Quasi-Cyclic Code for Fault-Tolerant Finite State Machines

FENG Shui-chun, MENG Xin, MAO Bo-nian, BIAN Chun-jiang   

  1. National Space Science Center, Chinese Academy of Science, Beijing 100191, China
  • Received:2013-01-15 Online:2014-02-28 Published:2014-01-07

摘要:

有限状态机作为星载数字系统实现控制逻辑的重要手段,其稳定性直接影响系统的正常运行. 空间辐射环境所造成的单粒子翻转效应会导致有限状态机不稳定. 目前常用的容错方法适于处理状态机的1位翻转错误,而具有高可靠性要求的系统还需要能处理2位翻转错误. 基于(16,8)准循环码的有限状态机容错设计方法,可实时纠正1位或2位翻转错误,检测到3位翻转错误,使有限状态机拥有更高的可靠性. 此方法同时具有硬件易实现,系统延时小等优点.

关键词: 星载数字系统, 单粒子效应, 可编程门阵列, 有限状态机, 容错设计, 准循环码

Abstract:

The stabilities of finite-state machine (FSM) seriously affects the normal operation of satellite borne system, and is important for control logic. Single event upset caused by space radiation environment often leads to FSM instabilities. Current fault-tolerant methods can correct single error. However, the correction of double errors for those high reliability systems is also necessary. A new design of field program gate array(FPGA) based on (16,8) quasi-cyclic code was presented. With advantages of high reliability, uncomplicated hardware and short delay. The design can correct single or double errors, and detect triple errors as well.

Key words: stabilities of finite-state machine, single event upset, field program gate array, finite-state machine, fault-tolerant, quasi-cyclic code

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