FPGA异构加速卡电源完整性分析

doi:10.13190/j.jbupt.2017-238

北京邮电大学学报 ›› 2018, Vol. 41 ›› Issue (4): 76-80.doi: 10.13190/j.jbupt.2017-238

FPGA异构加速卡电源完整性分析

杨正^1,2, 阚宏伟¹, 刘铁军¹, 张闯¹

1. 浪潮集团有限公司体系结构研究部, 济南 250000;
2. 浪潮集团有限公司高效能服务器和存储技术国家重点实验室, 北京 100085

收稿日期:2017-12-23 出版日期:2018-08-28 发布日期:2018-10-09
作者简介:杨正(1989-),女,博士,研究员,E-mail:yang.zheng@inspur.com.

Power Integrity Analysis of FPGA Heterogeneous Accelerate Board

YANG Zheng^1,2, KAN Hong-wei¹, LIU Tie-jun¹, ZHANG Chuang¹

1. Architecture Research Department, Inspur Group Company Limited, Jinan 250000, China;
2. State Key Laboratory of High-End Server and Storage Technology, Inspur Group Company Limited, Beijing 100085, China

Received:2017-12-23 Online:2018-08-28 Published:2018-10-09

摘要/Abstract

摘要： 以现场可编程门阵列（FPGA）为核心构建了高性能、高密度异构加速卡.基于目标阻抗设计方法，对解耦电容和电路进行了交流和直流分析，并给出了电源完整性后仿结果，验证了该分析方法的有效性.最后给出了该FPGA异构加速卡在图像识别中的应用实例，并与中央处理器、图形处理器的性能作了对比.

关键词: 电源完整性, 电源分配网络, 目标阻抗, 解耦电容

Abstract: A high performance and high density field programmable gate array (FPGA) heterogeneous accelerate board was proposed. Base on target impedance design method, the AC/DC characteristics were analyzed and power integrity post simulation was present. Application on image identification utilized the proposed heterogeneous FPGA accelerate board and performance comparison are given.

Key words: power integrity, power distribution network, target impedance, decoupling capacitor

中图分类号:

TN402

杨正, 阚宏伟, 刘铁军, 张闯. FPGA异构加速卡电源完整性分析[J]. 北京邮电大学学报, 2018, 41(4): 76-80.

YANG Zheng, KAN Hong-wei, LIU Tie-jun, ZHANG Chuang. Power Integrity Analysis of FPGA Heterogeneous Accelerate Board[J]. JOURNAL OF BEIJING UNIVERSITY OF POSTS AND TELECOM, 2018, 41(4): 76-80.

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FPGA异构加速卡电源完整性分析

Power Integrity Analysis of FPGA Heterogeneous Accelerate Board

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