Abstract: A novel neural network cell controller with a new structure of input buffers in ATM switch are proposed. For each input port of switch, there are two buffers. Cells sensitive to time delay are put in high priority buffers and cells insensitive to time delay in low priority buffers. Accordingto certain optimization rules, head cells of input buffers are selected to be switched by a hopfield neural network controller. The simulation results show that the proposal can ensure cells to meet their QoS and the cell lost rate and cell delay are lower than those of randomly selecting cells in a open window. Also,the effects of parameters in neural network are discussed.

Key words: ATM , input buffer, neural network