Abstract:

Specifically for challenge to the power dissipation and area during high-level synthesis in electronic design automation（EDA）, An imprecise arithmetic automation synthesis and optimization approach is proposed, the word-length optimization are based on finite field characteristic. The imprecise polynomial circuit optimization is based on arithmetic transformation method, which considering the fixed point and floating point representation condition first, then a realization of circuits under different accuracy boundary is given, the power dissipation and area error is traded off, which applying branch and bound method to find the solution with minimal cost, to determine the minimal word length which satisfies the error bound, making use of the automation synthesis approach to get ultimate optimize structure at the same time. The experiment results demonstrate power dissipation and area got a 35% and 20% reduction respectively by increasing 05%～1% round off error.

Key words: finite field, imprecise arithmetic circuits, arithmetic transformation, error bound