Abstract: According to the features of rapid and flexible design, high reliability and low cost of EPLD programmable technology, using VLSI, CAD and MAX+PLUS II developed by Altera company, research and develop EPLD (Erased Programmable Logic Device) design specialty test. This experiment can be used to promote the ability of engineering practice and to combination of practice and theory of students.

Key words: very large scale integration technology , erasable programmable logic device, very high speed integrated circuit hardware description language