Journal of Beijing University of Posts and Telecommunications

  • EI核心期刊

JOURNAL OF BEIJING UNIVERSITY OF POSTS AND TELECOM ›› 2005, Vol. 28 ›› Issue (4): 23-26.doi: 10.13190/jbupt.200504.23.wangxsh

• Papers • Previous Articles     Next Articles

Study on the onBoard Computer System Based on ARM Processor

WANG Xinsheng1,SUN Hanxu1,XU Guodong2,TONG Zhihong3   

  1. 1School of Automation, Beijing University of Posts and Telecommunications, Beijing 100876, China; 2Institute of Satellite Engineering and Technology, Harbin Institute of Technology, Harbin 150001, China; 3Xi'an Lishan MicroElectronic Company, Xi'an 710054, China
  • Online:2005-08-28 Published:2005-08-28

Abstract:

The new fault tolerant onboard computer(OBC) with dual processing modules is presented to improve the microsatellite data handling. Each processing module is composed of 32bit ARM processor. Using the fault tolerance method, The OBC's hardware structure is implemented based on commercialoffthe shelf (COTS) devices. As well as, a detail analysis of the fault handling mechanism and the software architecture is given. Considering the demanding of the extremely tight constraints on mass, volume, power consumption and space environmental conditions, the new fault tolerant onboard computer's data handling is enough to meet the mIcro satellite missions.

Key words: microsatellite, onboard computer, fault tolerance