Journal of Beijing University of Posts and Telecommunications

  • EI核心期刊

JOURNAL OF BEIJING UNIVERSITY OF POSTS AND TELECOM ›› 2013, Vol. 36 ›› Issue (1): 50-53.doi: 10.13190/jbupt.201301.50.wangj

• Papers • Previous Articles     Next Articles

Performance Analysis and Optimization Method of FPLL

WANG Jun, SUN Xin   

  1. School of electronics and information engineering, Beijing Jiaotong University, Beijing 100044, China
  • Received:2012-06-09 Revised:2012-11-30 Online:2013-02-28 Published:2013-01-19

Abstract:

Establishing the loops mathematic module, the phase tracking error equation of the second-order frequency locking loop(FLL) assisted third-order phase locking loop(PLL) is derived. In the module, the tracking error of FLL is mixed into PLL. Two points of view are given: firstly, the phase dynamic tracking error of frequency locking loop assisted PLL(FPLL) is equal to zero in case of jerk; the phase thermal noise tracking error includes the thermal noise of PLL and the noise component of FLL, secondly, a new optimization method is proposed to optimizing both bandwidths of PLL and FLL. The optimization method minimizes the total phase tracking error to meet the need of constraint of FLLs frequency tracking error being within the PLLs locking bandwidth. Simulation shows that the analysis of phase tracking error is accurate; the optimization method is able to improve the tracking accuracy while being stable. This research will help the later extra design of FPLL.

Key words: frequency locking loop assisted phase locking loop, performance analysis, optimization method

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