Abstract: With the development of various image and video recognition applications, the demand for visual data processing and understanding has exploded. As a result, the demand for a real-time, intelligent user experience is increasing, and the diversity and volatility of applications make it necessary for reconfigurable computing architectures to be both flexible and efficient. However, the method of realizing dynamic reconfiguration using the traditional upper computer suffers from the problems of long reconfiguration times and low reconfiguration efficiency, which greatly limit the performance improvement of reconfigurable structures. In order to reduce the reconfiguration time and accelerate the hardware reconfiguration process, an instruction flow-driven active self-reconfiguration method is proposed. The method makes full use of the rich PE resources of the reconfigurable array, monitors the execution state of the array autonomously through the PE, and autonomously realizes functional reconfiguration according to the monitoring results. The experimental results show that compared with the traditional centrally controlled reconfigurable array processor, the computational speed is improved by 25% and the configuration time is reduced by 27% in achieving the dynamic reconfiguration process of de-block filtering.

Key words: reconfigurable computing structure, array processor, active self-reconfiguration, autonomous monitor, deblocking filtering